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173 lines
5.8 KiB
173 lines
5.8 KiB
3 years ago
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%! Detailed register description file for PCICFG.EXE by Ralf Brown
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%!
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%! Filename 80867110.PCI = Vendor 8086h, Device 7110h
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%! Intel 82731AB PIIX4 PCI-to-ISA Bridge
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%! Last Edit 31 Dec 1997 by Andy Sawyer
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%!
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%! Reference : Intel document 29056201.PDF
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%! "82371AB PCI-TO-ISA/IDE XCELERATOR (PIIX4)"
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%!
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%! Since the 82371AB indicates that it is a "single function" device
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%! for all functions except function 0, version 1,0 of PCICFG.EXE
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%! does not correctly display all functions.
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%!
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%! See also:
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%! 80867111.PCI
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%! 80867112.PCI
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%! 80867113.PCI
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!begin
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Intel 82371AB PIIX4 PCI-to-ISA Bridge registers in detail: [by Andy Sawyer]
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ISA I/O Recovery Time
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DMA Reserved Page Register Aliasing %[4C:7]Ed
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8-bit I/O Recovery %[4C:6]ed - %[4C:5-3]{81234567} SYSCLK
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16-bit I/O Recovery %[4C:2]ed - %[4C:1-0]{3124} SYSCLK
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X-Bus Chip Select
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Microcontroler Location Enable %[4E:10]ed
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1-Meg Extended BIOS Enable %[4E:9]ed
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I/O APIC %[4E:8]ed
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Extended BIOS Enable %[4E:7]ed
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Lower BIOS Enable %[4E:6]ed
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Coprocessor Error Fucntion Enable %[4E:5]ed
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IRQ12/Mouse Control %[4E:4]|IRQ12;Mouse|
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Port 61h Alias Enable %[4E:3]ed
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BIOSCS# Write Protect Control %[4E:2]|Read Only;Read Write|
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Keyboard Controller I/O Ports %[4E:1]ed
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Real-Time Clock I/O ports %[4E:0]ed
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PIRQRC Route Control
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PIRCQA Routing %[60:7]Ed - %[60:3-0](PIRQCRRoute)
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PIRCQB Routing %[61:7]Ed - %[61:3-0](PIRQCRRoute)
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PIRCQC Routing %[62:7]Ed - %[62:3-0](PIRQCRRoute)
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PIRCQD Routing %[63:7]Ed - %[63:3-0](PIRQCRRoute)
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Serial IRQ Control
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Serial IRQ Enable %[64:7]ed
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Serial IRQ Mode %[64:6]|Quiet;Continuous|
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Serial IRQ Frame Size %[64:5-2+17]d
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Start Frame Pulse Width %[64:1-0]|4;6;8;Reserved|
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Top of Memory Register
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Top of Memory %[69:7-4+1]d Mbyte
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ISA/DMA Lower BIOS %[69:3]|not ;|forwarded to PCI
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640k-768k Memory Region %[69:2]|not ;|forwarded to PCI
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ISA/DMA 512k-640k Region %[69:1]|not ;|forwarded to PCI
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Misc. Status Register
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SERR# Generation %[6A:15]d
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Host-to-PCI Bridge Retry enable %[6A:7]ed
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Motherboard Device DMA Control 0
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Type F DMA Buffer Enabled %[76:7]ed
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Type F DMA Channel Routing %[76:2-0](MBDMA)
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Motherboard Device DMA Control 1
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Type F DMA Buffer Enabled %[77:7]ed
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Type F DMA Channel Routing %[77:2-0](MBDMA)
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APIC Base Address Relocation Register
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A12 Mask %[80:6]d
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Base Address FEC0%[80:5-2]x%[80:1-0]x00h
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Detrministic Latency Control Register
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SERR# on delayed transaction timeout %[82:3]ed
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USB Passive Release %[82:2]ed
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Passive Release %[82:1]ed
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Delayed Transactions %[82:0]ed
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PCI DMA Configuration
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DMA Channel 7 %[90:15-14](DMAType)
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DMA Channel 6 %[90:13-12](DMAType)
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DMA Channel 5 %[90:11-10](DMAType)
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DMA Channel 3 %[90:7-6](DMAType)
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DMA Channel 2 %[90:5-4](DMAType)
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DMA Channel 1 %[90:3-2](DMAType)
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DMA Channel 0 %[90:1-0](DMAType)
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Distributed DMA Slave Base Pointer Registers
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Channel 0-3 %[92:15-6<6]4x
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Channel 5-7 %[94:15-6<6]4x
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General Configuration Register
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KBCCS# %[B0:31]|KBCCS#;GPO26|
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RTCALE %[B0:30]|RTCALE;GPO25|
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RTCCS# %[B0:29]|RTCCS#;GPO24|
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XOE#/XDIR# %[B0:28]|XOE#/XDIR#;GPO22/GPO23|
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RI# %[B0:27]|RI#;GPI12|
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LID %[B0:25]|LID;GPI10|
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BATLOW# %[B0:24]|BATLOW#;GPI9|
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THRM# %[B0:23]|THRM#;GPI8|
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SUS_STAT2# %[B0:22]|SUS_STAT2#;GPO21|
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SUS_STAT1# %[B0:21]|SUS_STAT1#;GPO20|
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ZZ %[B0:20]|ZZ;GPO19|
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PCI_STP# %[B0:19]|PCI_STP#;GPO18|
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CPU_STP# %[B0:18]|CPU_STP#;GPO17|
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SUSB#/SUSC# %[B0:17]|SUSB#/SUSC#;GPO15/16|
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SERIRQ %[B0:16]|GPI7;SERIRQ|
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SMBALERT# %[B0:15]|SMBALERT#;GPI11|
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IRQ8# %[B0:14]|GPI6;IRQ8#|
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PC/PCI REQC/GNTC %[B0:10]|GPI4/GPO11;REQC/GNTC|
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PC/PCI REQB/GNTB %[B0:9]|GPI3/GPO10;REQB/GNTB|
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PC/PCI REQA/GNTA %[B0:8]|GPI2/GPO9;REQA/GNTA|
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Decode configuration %[B0:1]|Subtractive;Positive|
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PnP Address Decode %[B0:6]ed
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Alternate Access Mode %[B0:5]ed
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IDE Secondary Interface %[B0:4]Ed
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Secondary IDE Signal Interface %[B0:12]|Enabled;Tri-State|
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Primary IDE Signal Interface %[B0:11]|Enabled;Tri-State|
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CONFIG2 Status %[B0:3]d
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CONFIG1 Status %[B0:2]d (%[B0:2]|Pentium;Pentium II|)
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ISA/EIO Select %[B0:0]|EIO;ISA|
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Real Time Clock Configuration
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RTC Positive Decode %[CB:5]ed
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Lock Upper RAM Bytes %[CB:4]ed
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Lock Lower RAM Bytes %[CB:3]ed
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Upper RAM Enable %[CB:2]ed
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RTC Enable %[CB:0]ed
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!end
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!enum PIRQCRRoute
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Reserved
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Reserved
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Reserved
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IRQ 3
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IRQ 4
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IRQ 5
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IRQ 6
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IRQ 7
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Reserved
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IRQ 9
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IRQ 10
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IRQ 11
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IRQ 12
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Reserved
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IRQ 14
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IRQ 15
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!end
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!enum MBDMA
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DMA Channel 0
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DMA Channel 1
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DMA Channel 2
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DMA Channel 3
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Disabled
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DMA Channel 5
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DMA Channel 6
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DMA Channel 7
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!end
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!enum DMAType
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Normal ISA DMA
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PC/PCI DMA
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Distributed DMA
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Reserved
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!end
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%! end of file
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